• 911.5
  • 1200
  • 25
  • 1
  • 0.06
  • true
  • true
  • false
  • true
  • true
  • true
  • false
  • 1
  • c1r
    c1r
  • c1v_c2r
    c1v_c2r
  • c2v_c3r
    c2v_c3r
  • c3v_c3(bis)r
    c3v_c3(bis)r
  • c3(bis)v_c4r
    c3(bis)v_c4r
  • c4v_c5r
    c4v_c5r
  • c5v_c5(bis)r
    c5v_c5(bis)r
  • c5(bis)v_c6r
    c5(bis)v_c6r
  • c6v_c7r
    c6v_c7r
  • c7v_c8r
    c7v_c8r
  • c8v_c9r
    c8v_c9r
  • c9v_c9(bis)r
    c9v_c9(bis)r
  • c9(bis)v_c10r
    c9(bis)v_c10r
  • c10v_c11(bis)v
    c10v_c11(bis)v
  • c11(bis)r_c11r
    c11(bis)r_c11r
  • c11v_c12r
    c11v_c12r
  • c12v_c13r
    c12v_c13r
  • c13v_c14r
    c13v_c14r
  • c14v_c15r
    c14v_c15r
  • c15v_c16r
    c15v_c16r
  • c16v_c17r
    c16v_c17r
  • c17v_c18r
    c17v_c18r
  • c18v_c19r
    c18v_c19r
  • c19v_c20r
    c19v_c20r
  • c20v_c21r
    c20v_c21r
  • c21v_c22r
    c21v_c22r
  • c22v_c23r
    c22v_c23r
  • c23v_c24r
    c23v_c24r
  • c24v
    c24v